Seeking position in Semiconductor industry for Design, Product or Applications Engineering.
* 3 years experience in Digital Design and FPGA design.
* Hands on experience with Synopsys tools•••••Design Compiler, PrimeTime.
* Hands on experience in VLSI /Analog IC design, Tx / Rx circuit designing for ATM and SONET.
* Project experience in PCI Bus architecture.
* Knowledge of Verilog/VHDL for FPGA/CPLD development.
* Practical knowledge of various design issues for low power VLSI circuits, high-speed transceivers (SERDES) and various microprocessors.
* ASIC/FPGA Design, Hardware Design, Digital/Analog IC Design, C/C•••••, Unix Scripting tools, PERL.
Master of Science, Electrical Engineering, University of Colorado
Aug •••••Dec •••••
Bachelor of Technology, Osmania University, India Jul ••••• Jul •••••
Electrical and Electronics Engineering
HDL Tools: Verilog/VHDL, SPICE, MATLAB, LabView
EDA/Design Verification: Xilinx, Mentor Graphics, Cadence, Synopsys (DC Compiler, Prime Time), Magic.
Languages: C/C•••••, PERL, •••••x•••••
Operating Systems: Windows •••••/NT/XP, Solaris, VxWorks, Linux.
Research Assistant, Univ. of Texas at San Antonio, TX
Aug ••••• - May •••••
Topic: Design issues of high performance Multimedia Processors.
Subjects: Applied engineering Analysis, Electric Circuits and Network Theory.
Nov •••••Aug •••••
* Responsible for RTL design logic verification, synthesis, timing analysis
* Assisted in ••••• microcontroller design/verification using VHDL.
* Wrote test benches in Verilog.
* Debugged the results and interacted with the designers to correct the errors found.
Hardware Design Intern, Vision••••• Technologies,
Jan ••••• -Sep•••••
* Assisted design engineers in design verification of hardware at the system, circuit board, and FPGA levels.
* Documented digital designs.
* Supported labs sessions.
PCB Design: Ferrite Filters: A solution to the problem of terminating high speed data bus lines.
Study of terminations and ferrite beads, studied the challenges encountered in terminating high speed parallel data buses. Usage of ferrite beads as terminators and their construction. Performed simulations using Cadence Spectra Quest. Analysis has done using IBIS models.
High Speed Design: Design of ••••• GHz Transceiver
•••••Gbits/s SERDES Transceiver, A single transceiver provides a low-cost physical layer solution for •••••Gbits/s serial link interface including a complete Serializer/Deserializer (SERDES) function with transmit and receive sections in a single device. Digital blocks (8B/•••••B Encoder/decoder, FIFO) are coded in Verilog. 8B/•••••B encoding/decoding is in compliant with the IEEE ••••• standard.
Analog block (LVDS Transceiver) was designed and implemented in •••••V •••••micron CMOS technology at transistor level.
Communication Chip Design: SONET STS••••• Transceiver
SONET STS••••• Transceiver, the project involved the complete study of SONET, its features and frame structure. Designed and tested the STS••••• framer in Verilog. Performed simulations using ModelSim from Mentor Graphics.
PCI Bus Architecture: PCI ATM NIC
A highly used adapter, ATM NIC designed and implemented. The NIC has PCI bus interface to exploit the processors full native bus speed. The design met the timing specifications of the PCI. The design methodology involved the technology and modularity considerations. The design is implemented on Xilinxs Virtex xcv•••••bg••••• FPGA. Xilinx Foundations ISE••••• and ModelSim •••••c software tools were used to carry out the design development and verification.
Real Time Embedded Systems: Voice Over IP
Configured the PCI sound card with integrated audio codec to automatically transmit and receive data
with the host VxWorks PC. The audio packets were transmitted over the Ethernet link using UDP.
The VoIP design was analyzed to minimize the delay and increase the sound quality of the system using real-time theory and other techniques.
Design of DLX CPU in Verilog.
Design of ••••• Microcontroller in VHDL.
Design of ••••• Microprocessor in Verilog.
High Speed Digital Design
Mixed Signal Analog IC Design
Low Power VLSI Design
PCI Bus Arch & FPGA Design
Real Time Embedded Systems
Venkataramana Reddipalli, ••••• ••••• and Parimal Patel,Design and Implementation of ATM NIC in FPGA, •••••th International Society for Computer Applications in Industry and Engineering, San Diego, CA, Nov ••••• •••••