Principal Engineer

Groton, MA 01450 • 396 mi.
Job Function:
Engineering
Email
•••••
Phone
•••••
Member No.
1503968
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Employment Type:
Full-Time
Salary:
$110-110k
Education:
Bachelor's Degree
Citizenship:
U.S. Citizen
Willing to Relocate:
No Relocation
Travel Preference:
No Preference
Maximum Commute:
No Preference

RESUME

Professional Summary:
Twenty plus years as both an individual contributor and as a project leader. Expertise in the RF/microwave and analog fields. Product development experience from concept to production within budget and schedule constraints. Member of architectural design team tasked to evaluate project goals, and bring initial concept to a realizable set of requirements. Defined specifications, schedules and manpower requirements. Strong team player by assisting others in the group by applying skills in the area of high speed and noise sensitive designs. Defined production test plans and training supporting engineers as products moved to sustaining phase. Design expertise at the IC level, thick and thin film hybrid circuits and PCB.

EXPERIENCE SUMMARY:

Alcatel USA (formerly Astral Point Communications acquired in April of •••••) ••••• to •••••
Team Leader/Principal Design Engineer
Currently managing technical resources for a large Matrix Switch which is being evaluated by AT&T and other major telecommunications customers. I have also recently developed designs to operate at •••••Gbits/sec across copper back plane. Previously was the Project Leader and Architect for the OC••••• (•••••Gbits/sec) LineCards and OC••••• Transponder. These products have now successfully transitioned into production after a design and development cycle of less than one year.
Responsibilities included:
h Created Project Design Specifications and Product Definition working with Marketing Group
h Defined the general architecture and translating it into detailed design blocks
h Detailed design of high speed clock distribution and PLL
h Detailed design of SERDES and other high speed data interfaces from optics to back plane
h Worked with layout resource for placement and routing of virtually the entire design
h Reviewed work of other designers
h Created and updating schedules
h Consulted on high speed issues for other team members and designs
h Defining manpower requirements
h Managing Project Resources (4 Principal/Senior engineers)
h Created/maintained data base to track schematic changes and revisions along with hardware bugs/fixes found during development cycle

Vigilant Networks (acquired in August of •••••) ••••• to •••••
Project Leader/Principal Design Engineer
Developed top level system architecture as well as detailed design of high speed non intrusive monitoring system used for LAN monitoring. Performed extensive simulation using both SPICE and EM simulators. Performed both IC design and board level design with significant effort placed on layout of crucial connections. Developed testing and calibration methods and managed the implementation of these techniques working closely with outside vendors for both IC and board level testing. Performed Project Management duties to support and coordinate with outside contractors and internal engineering resources.

LeCroy Corporation, Spring Valley, N.Y. ••••• to •••••
Senior Electronic Engineer for Corporate Research and Development
Responsibilities included designing multi gigahertz wide band front ends used in oscilloscopes. Designs included MMIC amplifiers using an advanced process involving Heterojunction Bipolar Transistors. Also designed thick and thin film hybrids. Experience involves layout of both MMIC and hybrid circuits as well as extensive use of CAE simulation tools. Other responsibilities include project management including moving designs into production. Last work included evaluation of 8 bit, 2 Gs/s ADC designs based on HBT technology and new amplifier design based on same technology. Also evaluated various technologies for future front designs including InP and SiGe processes.

Sony Telecommunications Research Lab, Paramus, N.J. ••••• to •••••
Project Engineer, R.F. Systems
Responsibilities included the design and development of R.F. and Microwave subsystems for Telecommunications applications.
Reason for leaving: Research lab closed down.
••••• to •••••
NCI, Paramus, N.J.
Project Manager
Responsible for the design, development and production supervision of microwave frequency synthesizers, phase locked oscillators (PLOs) and digitally tuned oscillators (DTOs). Position required close working relationships with customers from the price quotation until final delivery of product.

Extensive experience with the following:
Tools:
Network, Impedance and Spectrum Analyzers; Digital Sampling Oscilloscopes; Analog Oscilloscopes; Time Domain Reflectometery; OC••••• SONET Analyzer; Wire and Ribbon Bonding
Software CAE/CAD:
Agilents ADS; PSPICE; HSPICE; Sonnet Electro Magnetic simulator; MS Word; MS Project; MS Access; MS Excel; Visio; Viewdraw; View Logic

EDUCATION:
B.S.E.E. UNIVERSITY OF CONNECTICUT - Storrs, CT
University of Maryland: Microwave Linear Design
George Washington University: Digital Cellular Telephony
•••••s Institute of Technology: Spread Spectrum Communications
University of California, Los Angeles: Microwave Nonlinear Design
Member of IEEE:
Microwave Theory and Techniques
Solid State Circuits
Published Papers:
IEEE GaAs IC Symposium ••••• & Microwave Journal
5GHz Sampling Oscilloscope Front-End Based on Heterojunction Bipolar Transistors (HBT)
Clearance:
Secret